NSGA-II Based Thermal-Aware Mixed Polarity Dual Reed–Muller Network Synthesis Using Parallel Tabular Technique

Abstract

Proposed work presents an OR-XNOR-based thermal-aware synthesis approach to reduce peak temperature by eliminating local hotspots within a densely packed integrated circuit. Tremendous increase in package density at sub-nanometer technology leads to high power-density that generates high temperature and creates hotspots. A nonexhaustive meta-heuristic algorithm named nondominated sorting genetic algorithm-II (NSGA-II) has been employed for selecting suitable input polarity of mixed polarity dual Reed–Muller (MPDRM) expansion function to reduce the power-density. A parallel tabular technique is used for input polarity conversion from Product-of-Sum (POS) to MPDRM function. Without performance degradation, the proposed MPDRM approach shows more than 50% improvement in the area and power savings and around 6% peak temperature reduction for the MCNC benchmark circuits than that of earlier literature at the logic level. Algorithmic optimized circuit decompositions are implemented in physical design domain using CADENCE INNOVUS and HotSpot tool and silicon area, power consumption and absolute temperature are reported to validate the proposed technique.