Abstract
This work presents a novel circuit for detecting transient faults in combinational and sequential logic. The detection mechanism features a built-in current sensor connected to the bulks of the monitored logic. The proposed circuit was optimized in terms of power consumption and enhanced with low-power sleep-mode. In addition, a calibration method for bulk built-in current sensors is presented. Overhead results indicate an increase of only 15% in power consumption which represents an improvement of factor 7 compared to similar existing sensors.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
