Abstract

In this article, we first propose and demonstrate a novel target-impedance (Z) extraction based optimal power distribution network (PDN) design methodology for high performance solid-state-drive (SSD) products. Instead of using the current profile of a chip power models (CPMs), the suggested methodology uses both measured current spectra and hierarchical PDN-Z models for target-Z calculation. We successfully measured the PCB-level current consumed by a memory package on SSD device using a test interposer specifically designed for current probing without interrupting the normal operations. Then, the measured PCB-level current is converted to the chip-level current value using Y-matrix of the hierarchical PDN-Z model. Compared with the simulation time for extracting a CPM current model, the proposed current measurement has relatively no time limit and, therefore, the target-Z covering a broadband frequency range is calculated based on the measured current spectrum. In addition, passive components such as decoupling capacitor are effectively selected using the deep-Q learning algorithm to satisfy the target- Z extracted by the proposed method and to optimize the PDN design. Finally, we verified for the first time that the mass-produced SSD product with the optimized PDN design satisfies the target voltage ripple in both simulation and measurement demonstrations.

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.