Novel Self-Modulated Lateral Superjunction Device Suppressing the Inherent 3-D JFET Effect

Abstract

A novel self-modulated superjunction lateral double-diffused MOSFET (SM-SJ LDMOS) is proposed and experimentally realized in this letter. When a SJ is introduced into a lightly doped N-drift region, the 3-D depletion regions appear surrounding the P-pillars. This 3-D junction field effect transistor (JFET) effect decreases the current paths in both N-pillars and N-drift, causing a largely increased specific on-resistance ${R} _{\text {on,sp}}$ especially for the SJ with a narrow cell pitch. To suppress the inherent 3-D JFET effect, the SM-SJ structure is proposed by replacing the P-pillars with a series of P-islands. These P-islands with linearly reduced lengths modulate the surface electric field to increase the breakdown voltage ${V} _{{\text {B}}}$ while the N-drift areas between P-islands weaken the 3-D JFET effect to reduce ${R} _{\text {on,sp}}$ . Compared with the conventional SJ device, the measured ${V} _{\text {B}}$ of the SM-SJ LDMOS is increased by 53.1% from 260 V to 398 V with ${R} _{on,sp}$ reduced by 22.3% from 35.4 $\text{m}\Omega ~\cdot $ cm2 to 27.5 $\text{m}\Omega ~\cdot $ cm2.