Novel RF front-end design for low power UWB applications

Abstract

The needs for short range and fine resolution communications systems has motivated researchers to replace the wire-line communications systems with ultra-wideband communications systems. The ultra-wideband radio technology introduces significant advantages for short-range communications systems. This technology operates in a wide bandwidth, which allows for gigabit data rates over short distances. Due to the low complexity of the ultra-wideband system and low transmit power, it benefits from low DC power consumption. However, with growing demands for wireless communications systems, the ultra-wideband communications systems are facing more challenging requirements. Since the ultra-wideband covers a wide range of frequency, it causes challenges in the design of building blocks, in particular receiver front-end. The scope of this dissertation is to design a novel and innovative RF front-end receiver for the ultra-wideband transceivers using CMOS technology. A T-coil network can be implemented as a high order filter for bandwidth extension. This technique is incorporated into the design of the input matching and output peaking networks of a low-noise amplifier. The intrinsic parasitic capacitances within the transistors are exploited as a part of the wideband structure to extend the bandwidth. Using the proposed topology, a wideband low-noise amplifier with a bandwidth of 3−8 GHz, a maximum gain of 16.4 dB and noise figure of 2.9 dB (min) is achieved. The total power consumption of the wideband low-noise amplifier from the 1.8 V power supply is 3.9 mW. The prototype is fabricated in 0.18 μm CMOS technology. Furthermore, a two-stage down-conversion architecture for 3−8 GHz ultra-wideband receiver front-end is designed, which uses a local oscillator frequency equal to half of the input frequency. A single stage low power single-to-differential low-noise amplifier is designed to eliminate the need for an off-chip balun and increases the integration