Novel PVT Resilient Low-Power Dynamic XOR/XNOR Design Using Variable Threshold MOS for IoT Applications

Abstract

A variable threshold voltage hybrid evaluation network based dynamic XOR/XNOR gate is presented to reduce the parameters leakage power dissipation, dynamic power, and layout area compared to existing dynamic gates under similar delay time conditions. This study explores the impacts of process, supply voltage, and temperature changes on leakage power dissipation and dynamic power using Monte Carlo simulation. The Monte Carlo analysis demonstrates that leakage power dissipation and dynamic power reduction have significantly improved. Furthermore, when compared to hybrid type dynamic XOR/XNOR (N-type XOR/XNOR), the proposed design reduces leakage power and dynamic power consumption by 6.1% (54.0%) and 18.75% (35.0%), respectively. While the proposed design has a slight layout area penalty compared to a hybrid type dynamic XOR/XNOR, it offers the same amount of the layout area as a traditional N-type XOR/XNOR.