Novel packaging design for high-power GaN-on-Si high electron mobility transistors (HEMTs)

Abstract

This study describes the development of packaging for high-power AlGaN/GaN high electron mobility transistors (HEMTs) on a silicon substrate. A transistor is attached to a V-grooved copper base, and mounted on a TO-3P lead-frame. Unlike flipchip or copper-molybdenum-copper (CMC)-based packaging technology, which is popular in the GaN HEMT industry, the proposed packaging structure is implemented on the periphery of the surface of the device to promote thermal dissipation from the Si substrate. The various thermal paths from the GaN gate junction to the case dissipate heat by spreading it to a protective coating; transferring it through bond wires; spreading it laterally throughout the device structure through an adhesive layer, and spreading it vertically through the bottom of the silicon chip. The effects of the design of the structure and its fabrication process on the performance of the device and its thermal resistance were studied. Thermal characterization reveals that the thermal resistance from the GaN chip to the TO-3P package was 13.72 °C/W. Self-heating in AlGaN/GaN device structures was measured by infrared (IR) thermography and micro-Raman spectroscopy. Experimental results indicated that a single chip that was packaged in a 5 × 3 mm V-grooved Cu base with a total gate-periphery of 30 mm had a power dissipation of 22 W with a drain bias of 100 V. Both DC and pulsed current–voltage (ID–VDS) characteristics are measured for a range of transistor structures and sizes, at various of power densities, pulse lengths, and duty factors. These are compared with measured channel temperature profiles.