Novel multiple bypass bins scheme for low-power UHD video processing HEVC binary arithmetic encoder architecture

Abstract

The HEVC is one of the most recent video coding standards, developed in order to face upcoming challenges, due to higher video quality and resolution. One of the HEVC components is the entropy encoder, which consists only of the Context Adaptive Binary Arithmetic Coding (CABAC) algorithm. The CABAC algorithm imposes some severe difficulties in order to achieve increasing throughput, due to the high data dependency among each processing element. Along with throughput, low-power consumption is a sought-after goal for video processing hardware architecture. This work proposes a novel multiplier-less scheme for multiple bypass bins processing focusing in increasing bin per cycle throughput focusing in low-power design for CABAC critical submodule Binary Arithmetic Encoder (BAE), with negligible degradation in frequency. The present work also accomplishes the insertion of low-power techniques, based on the average proportion of bins for video test sequences. Results show that the proposed work is able to process 8K UHD videos at 6.2 high tier with the minimum frequency among the works in the literature, which decreases the power dissipation of the block. The average power savings achieved by the insertion of low-power technique were, on average, 14.26%.