Abstract
This report describes a new algorithm for the joint estimation of carrier phase, symbol timing and data in a Turbo coded phase shift keyed (PSK) digital communications system. Jointly estimating phase, timing and data can give processing gains of several dB over conventional processing, which consists of joint estimation of carrier phase and symbol timing followed by estimation of the Turbo-coded data. The new joint estimator allows delay and phase locked loops (DLL/PLL) to work at lower bit energies where Turbo codes are most useful. Performance results of software simulations and of a field test are given, as are details of a field programmable gate array (FPGA) implementation that is currently in design.
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