Abstract
The drive for enhanced electrical performance and reduced silicon area has triggered significant changes in wafer fabrication, wafer level testing, and packaging technologies. In the wafer fabrication era, copper is quickly replacing aluminum as the interconnect metal of choice for technologies 0.13μm and below. To overcome the difficulty of wire bonding onto readily oxidized copper bond pads, capping copper bond pads with aluminum has been the industry standard method for wire bonding. In terms of wafer level testing and packaging, the resulting fine pitch geometry has created challenges for both cantilever probe and wire bond processes. Pad damage due to probe marks during probe process has been shown to cause “non-sticks” and “lifted bonds” at the wire bonding process. The wire bond yield loss due to pad damage is aggravated for fine pitch since increasingly smaller bonded ball diameters are formed on top of the same damage area caused by the probe mark. Wire Bond parameter optimization can minimize wire bond yield loss but cannot eliminate the problem. One logical solution is to lengthen the bond pad to create separate regions for probing and wire bonding. However, this method can result in a larger die size. This paper will reveal a unique bond pad structure that provides separate regions but yet results in no impact to the existing die size. This bond pad structure utilizes the aluminum cap layer to create a longer bond pad without changing the size of the underlying copper last metal, resulting in no impact to the existing die size. Evaluations were conducted on 0.13μm CMOS technology, with cantilever probing and wire bonding on 52μm bond pad size. Failure analysis and test methods to detect failures will be discussed. Designs of experiments for probing and wire bonding processes, characterization studies, and reliability results will be presented. Furthermore, a unique Extended Armored Pad (EAP) has been introduced for the purpose of reducing the Ta-Cu interface area under the Aluminum bond pad region because the Ta-Cu adhesion is known to be one of the weakest interfaces for Cu-interconnect BEOL processes.
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More From: Journal of Microelectronics and Electronic Packaging
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