Novel materials for thermal via incorporation into SOI structures

Abstract

Self-heating effects in ICs on silicon-on-insulator (SOI) substrates are due to the thick buried oxide layer present in the SOI substrate. Silicon dioxide has a poor thermal conductivity value (0.4-1.2WK-1m-1), compared with silicon (150WK-1m-1). In order to minimize this self-heating, the use of multiple-layer structures as thermal vias (TV) is investigated. The vias have been fabricated as sandwich layers with thin SiO2 (20 nm) enclosing low pressure chemical vapor deposited (LPCVD) silicon layers (1 βm), all IC compatible materials. The LPCVD silicon layers consisted of either polycrystalline silicon or a combination of amorphous silicon and polysilicon. Electrical testing of the oxide/silicon structures has shown that inclusion of an amorphous silicon layer in the oxide sandwich improves the interface between the oxide and the silicon layer. This provides better electrical stability with an operational capability >30 V. The capacitance of the multi-layer structure (96 pF), as measured at frequencies ≥1 MHz, confirms that the polysilicon behaves as a dielectric layer at these frequencies. Thermal conductivity assessment, using a four-terminal resistor structure, shows that the multilayer via offers an improved thermal conductivity (3.5WK-1m-10 when compared to a 1-βm homogenous buried oxide layer (0.8WK-1m-1)