Novel Materials and Processes for Miniaturization in Semiconductor Packaging

Abstract

The semiconductor industry is undergoing a significant transformation away from conventional methods of shrinking devices and reducing costs. Chip designers are actively exploring new technological avenues to improve cost-effectiveness while integrating more features into the silicon footprint. One promising strategy is Heterogeneous Integration (HI), which employs advanced packaging techniques to integrate independently designed and manufactured components using the most suitable process technology. However, the adoption of HI brings about design and security challenges. To facilitate HI, it is crucial to advance research and development in advanced packaging.The existing research highlights potential security threats in the advanced packaging supply chain, particularly due to the offshore presence of most Outsourced Semiconductor Assembly and Test (OSAT) facilities/vendors. Addressing the growing demand for semiconductors and ensuring a secure semiconductor supply chain have prompted significant efforts from the United States (US) government to relocate semiconductor fabrication facilities onshore. However, enhancing US-based advanced packaging capabilities is essential to fully realize the vision of establishing a secure, efficient, and resilient semiconductor supply chain. Our endeavor was driven by the need to identify potential bottlenecks and vulnerabilities in the US-based advanced packaging supply chain.