Abstract
We demonstrate a high-temperature superconductor (HTS) Josephson junction geometry using only in situ interfaces and with the current flowing in the a-b plane of the HTS. The trilayer on a substrate slope (TOSS) junction is a HTS-barrier-HTS structure deposited in situ on top of a pre-etched slope in the substrate. We present initial results on the fabrication and testing of YBa/sub 2/Cu/sub 3/O/sub 7-/spl delta// TOSS junctions with a Ga-doped PrBa/sub 2/Cu/sub 3/O/sub 7-/spl delta// barrier. These devices display resistively shunted junction like I-V characteristics with characteristic voltages up to 5 mV at 4.2 K. The TOSS junction concept is of interest for fundamental studies of interfaces in HTS and can also be applied to an integrated circuit technology.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
