Novel ESD Protection Scheme for Testing High Voltage LDMOS

Abstract

This paper presents a novel protection circuit for Electrostatic Discharge (ESD) for testing high-voltage devices using Silicon Controlled Rectifiers (SCRs). ESD related issues lead to test equipment damage, hence efficient protection techniques play a very critical role in testing high voltage devices. High-Voltage Laterally-Diffused MOSs (HV-LDMOSs) is extensively used for high voltage applications due to its advantages over other metal oxide semiconductor structures. In high voltage devices ESD protection is generally provided between the drain and source terminals. We have implemented SCRs as the ESD protection circuit for the drain connection in HV-LDMOSs. We have developed ESD stress models using conventional techniques such as human body, machine and charged device models for the high-voltage devices and implement SCRs as protection circuit in the high-voltage DIBs. Simulation has been completed to obtain the ESD stress data of the device. This ESD stress model data can be used to automate our testing process by incorporating the novel ESD protection scheme on a newly developed test software tool.