Abstract
We design and fabricate a novel Silicon NanoWire ( SiNW) array over the buried-oxide layer of (111) Silicon-On-Insulator (SOI) by using conventional microfabrication methods. Based on deep reactive ion etching (DRIE) and anisotropic wet etching, the help of horizontal control of silicon wall width and longitudinal control of top silicon thickness, the adjustment of nanowire size is improved. After thermal oxidation and release, the suspended nanowires located at the bottom of the cavity are more stable and robust than our previous reported SiNW array which is at the top of the cavity.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.