Abstract
The comparator is an essential element in concurrent error detection (CED). To ensure the correctness of error detection processes, comparators must be totally self-checking (TSC): any single fault occurring in the comparator must be detected by at least one normal input pattern, and before the detection of that fault, no erroneous output must be guaranteed. An area-time efficient static CMOS TSC comparator design is presented. This comparator uses only eight transistors and is totally self-checking with respect to stuck-at, stuck-open, stuck-on, bridging faults, and breaks.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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