Abstract
There are two main directions in the development of modern microprocessor architectures used for System on Chip: low Power consumption and high performance. The paper presents the method for enhancing LEON3 processor IP core with superscalar ability for high-performance and low-power systems. As compared to the original LEON3 IP core, the proposed super scalar design executes is up to two instructions per cycle with only one third area increase. Application to perform FFT/IFFT is developed and tested using enhanced architecture of LEON3 IP core for superscalar processing. Performance enhancement of LEON3 core is also compared with Very Long Instruction Word (VLIW) processor and Silicon labs application note. The enhanced SoC is synthesized and implemented on Actel FPGA ProASIC3E. The area, power and timing comparison is shown. Approximately 33% enhancement in execution time is obtained due to the proposed super scaling scheme for LEON3 IP core.
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