Abstract

A multi-rate 9.953-12.5-GHz low phase noise LC oscillator was realized in a 90-GHz f/sub T/ 0.2 μm SiGe BiCMOS process. It achieves a 36% tuning range by combining a 35% open-loop frequency calibration range having a sub-0.1% residual error with a 1% closed-loop varactor frequency tuning. The oscillator gain is below 130 MHz/V, while having less than 10% variation over the entire tuning range. The varactor is realized with multiple parallel-connected cells consisting of constant capacitors and voltage-controlled resistors that bring a lower process variation and a higher quality factor in comparison with standard diode and MOS varactors. A dual regulator architecture was used to provide both high PSRR and low output voltage noise. The supply pushing was reduced below 100 kHz/V by using a pushing cancellation circuit that balances the negative and positive voltage coefficients of the different nonlinear capacitors connected to the LC tank. A discrete-time automatic amplitude control loop using a variable tail resistor architecture was implemented to optimize the VCO's phase noise performance. The VCO specifications include 9.953-12.5-GHz frequency range, 0.1% frequency calibration error, -122 dBc/Hz phase noise at 1 MHz offset, <3 kHz 1/f/sup 3/ corner frequency, <-80 dBc spurious tones, 250×400 μm/sup 2/ die area and 5-mA bias current from a 3.3-V supply.

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