Nonuniform threshold voltage profile in a-Si:H thin film transistor stressed under both gate and drain biases

Abstract

In this paper we show that an a-Si:H thin film transistor (TFT) stressed with bias temperature stress (BTS) under both gate bias and drain bias produces a nonuniform threshold voltage profile which can be obtained from the quasi-Fermi potential profile and the threshold voltage (Vt)-shift data of BTS under the gate bias only. The transfer and output characteristics calculated with this nonuniform Vt-profile agreed well with the measured data, where the calculation was performed using both the gradual-channel approximation and independently the AIM Spice simulation with its level-15 a-Si TFT model. It is shown that local threshold voltage is high at the source and decreases toward the drain. Due to the nonuniform Vt-profile in the channel, the drain current level is higher in the forward direction, where the source and drain electrodes are the same between measurement and BTS, than in the reverse direction, where source and drain electrodes are interchanged. The forward and reverse I-V characteristics are somewhat similar to those of metal-oxide-semiconductor field-effect transistors with nonuniform channel doping.