Nonrecursive comb-based structure for power of three decimation factors: Design and FPGA implementation

Abstract

This paper presents a novel and simple comb-based decimation nonrecursive structure for the power of three decimation factors. The proposed structure has an improved alias rejection in comparison with the corresponding comb nonrecursive structure. This is achieved by inserting a simple multiplierless filter at the last stage. This filter introduces additional zeros in the certain comb folding bands, thus increasing the width and attenuation in the folding bands. The FPGA implementation confirms low power of the proposed structure.