Abstract
Resistive random access memory (RRAM) using various metal oxides (i.e., SiO 2 [1], HfO 2 , NiO[2], Al 2 O 3 , NbO) have attracted a great deal of attention since the current nonvolatile memory (NVM) has been approaching the scaling limits. Meanwhile, the undesired sneak current through neighboring unselected cells deteriorates the read margin and limits the maximum size of a crossbar array (i.e. read margin $\sim$ 10%) [3]–[4]. And the selector devices have been used to resolve the sneak path current issue. However, the additional selector device in the so-called 1S-1R architecture (i.e. one selector-one resistor -Fig. 1 (a)) increases the cell size, process complexity, and cost. In this work, a nonlinear (NL) resistive switching (RS) in a multilevel lR-only selectorless RRAM cell has been demonstrated by using a graphite-based stacked RRAM device.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
