Nonlinear Compression Codes Used In IC Testing

Abstract

It was found that the linear binary codes can be extended by a relatively high number of nonlinear check bits in such a way that the code words preserve the value of the maximum number of independently specified bits from the original linear code words. These extended nonlinear binary codes can be used for pattern compression and decompression. The number of scan chains loaded in parallel from the sequential decompressor may be increased while the number of specified bits is kept. The nonlinear structures guarantee the number of independently specified bits within the whole decompressed test pattern independently on the scan chain clock cycle for a substantially higher number of parallel scan chains than the linear decompressors while the number of bits transferred from the tester is kept. We proposed an algorithm that finds the appropriate nonlinear modification circuit of the sequential decompressor and verifies the test pattern quality for different numbers of care bits in a test pattern.