Noninverting Schmitt trigger circuit with electronically tunable hysteresis

Abstract

This paper reports a tunable hysteresis CMOS Schmitt trigger design techniques and an investigation of new buffer-based designs. The sizing of the two feedback inverters controls the two trip points of the structure independently. By the addition of voltage tune controlled sourcing transistor, the hysteresis window can be easily changed. Moreover, the new designs are immune to the kick-back noise coming from the succeeding inverter blocks. In this work, the VT-ST proves itself more reliable regarding dynamic and leakage power consumption and propagation delay. In this work, aspect ratio of the transistors is kept as small as possible, and the hysteresis loop is varied with a tunable voltage transistor. 5000 Monte Carlo simulations reveal that the VT-ST is more reliable as ΔVLHandΔVHL are almost equal, and a small variation is observed. For the comprehensive analysis, a figure of merit for all the circuits is derived and it is 3.16× higher for the proposed VT-ST than the conventional circuit. All simulation work is handled by the cadence virtuoso tool using UMC 40 nm technology.