Abstract
Since its invention half a century ago, dynamic random access memory (DRAM) has required dynamic refresh operations that block read accesses to refreshing data; this fundamental behavior gave DRAM its name. In contrast, DRAM's close relative—static random access memory (SRAM)—can statically re-enforce charge in the background without blocking read accesses at the cost of more expensive circuit structure. Nonblocking DRAM Refresh blurs this fundamental distinction between DRAM and SRAM at the system level to enable the best of both worlds—allowing read accesses to refreshing data in DRAM while preserving DRAM's low-cost circuit structure.
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