Abstract
The increasing complexity of chip functionality and the demand for higher configurability to service smart power requirements is driving interesting developments in emerging memories. ePCM is prominent among these for its benefits in terms of cost, process complexity, and performances. This paper begins with an overview of the existing baseline solutions (fuses, antifuses, single-poly floating gates) addressing low-density NVM application needs and more traditional floating gate memories (dual poly-flash) for higher density applications. The discussion then progresses to the promising results obtained on test chips and on real power product, which demonstrate the successful integration of PCM in the latest BCD platforms.
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