Abstract
Introduction In this paper, we propose non-pressure soldering method during reflow process for Zn-Al solder by breaking oxide film on its surface in advance of heating. SiC power semiconductors can operate at a temperature of 200 °C or more. The temperature difference between junction of the semiconductors and ambient air makes effective heat dissipation, therefore the cooling system that occupies a large volume in an semiconductor power module can be minimized. If we use these advantages, we have to use high melting point solder such as Zn-Al alloy solder. But the solder, which is usually provided as preformed sheet, have stiff natural oxide film on its surface, therefore applying pressure to the preformed sheet during reflow process is necessary to break the oxide film for secure soldering. New proposed method don’t need these way. The reflow process becomes simplified. Method and Result Effectiveness of the joining method is described with Fig. 1. This figure shows fracture surfaces of samples after shear test. The samples are attempted to join a circuit pattern and a SiC dummy chip by soldering of Zn-Al preformed solder. The sample (a) is not given ultrasonic bonding before reflow. The preformed sheet of the sample (b) is attached to both the chip and the circuit pattern by ultrasonic bonding in advance of reflow. Then the two samples are heated in the same reflow process and evaluated based on shear test. As a result of the test, The chip of the sample (a) was easily peeled off. On the other hand, shear strength of (b) is 60.4 MPa on average. The reason of different results is described below. Since the natural oxide film was broken by ultrasonic bonding, and a newly formed surface is exposed, the solder and both the chip and the circuit pattern are mutually joined. When the sample is heated, the solder in the preformed sheet melts and overflows from the bonding surface. Therefore the chip and the circuit pattern are joined by soldering. Without breaking oxide film like (a) in advance of reflow, solder joint doesn’t occur. The proposed soldering method has a potential to be low-cost and simple process for packaging of SiC power semiconductors. Acknowledgment This work was supported by Council for Science, Technology and Innovation (CSTI), Cross-ministerial Strategic Innovation Promotion Program (SIP), "Next-generation power electronics/Consistent R&D of next-generation SiC power electronics", and "the Novel Semiconductor Power Electronics Project Realizing Low Carbon Emission Society" (funding agency: NEDO). Figure 1
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