Non-Polar and Complementary Resistive Switching Characteristics in Graphene Oxide devices with Gold Nanoparticles: Diverse Approach for Device Fabrication

Geetika Khurana,Nitu Kumar,James F Scott,Ram S Katiyar,Manish Chhowalla

doi:10.1038/s41598-019-51538-6

Abstract

Downscaling limitations and limited write/erase cycles in conventional charge-storage based non-volatile memories stimulate the development of emerging memory devices having enhanced performance. Resistive random-access memory (RRAM) devices are recognized as the next-generation memory devices for employment in artificial intelligence and neuromorphic computing, due to their smallest cell size, high write/erase speed and endurance. Unipolar and bipolar resistive switching characteristics in graphene oxide (GO) have been extensively studied in recent years, whereas the study of non-polar and complementary switching is scarce. Here we fabricated GO-based RRAM devices with gold nanoparticles (Au Nps). Diverse types of switching behavior are observed by changing the processing methods and device geometry. Tri-layer GO-based devices illustrated non-polar resistive switching, which is a combination of unipolar and bipolar switching. Five-layer GO-based devices depicted complementary resistive switching having the lowest current values ~12 µA; and this structure is capable of resolving the sneak path issue. Both devices show good retention and endurance performance. Au Nps in tri-layer devices assisted the conducting path, whereas in five-layer devices, Au Nps layer worked as common electrodes between co-joined cells. These GO-based devices with Au Nps comprising different configuration are vital for practical applications of emerging non-volatile resistive memories.

Highlights

Www.nature.com/scientificreports seen as potential candidates for extended future applications in memory devices[17]
The crossbar architecture exhibits the commendable feature of an ideal 4F2 cell size that is promising for high density Resistive random-access memory (RRAM) integration, establishing it as an emerging non-volatile memory; but the crossbar architecture has the major issue of sneak path current[23]
Whereas device B consists of five layers ITO/graphene oxide (GO)/Au NPs/Al2O3/Al with bottom electrode is ITO/glass substrate, the second layer is of GO; the middle or common electrode is of architectures. Gold nanoparticles (Au Nps); the fourth layer is aluminum oxide (Al2O3); and lastly the top electrode is Al

Summary

Introduction

Www.nature.com/scientificreports seen as potential candidates for extended future applications in memory devices[17]. CRS is composed of two RRAM cells connected in anti-serial fashion, separated by a common metal electrode In this design one of the cells in CRS will always be in HRS or OFF state at low voltage, so the problem of sneak current is reduced effectively without the need of selector elements[26,27]. When the positive bias was applied, the Set process, which is the transition of the state from high resistance to low resistance, was observed at 2.3 V and the current increased sharply while re-sweeping, the positive voltage resulted in Reset process at 1.7 V, which is the switching of state from low resistance to high resistance; current was found to be decreased abruptly

Methods

Conclusion