Abstract
SummarySeveral new topologies of single‐switch non‐isolated DC–DC converters with wide conversion gain and reduced semiconductor voltage stress are proposed in this paper. Most of the proposed topologies are derived from the conventional inverse of SEPIC (Zeta) converter. The proposed topologies can operate with larger switch duty cycles compared with the existing single switch topologies, hence, making them well suitable for high step‐down voltage conversion applications. With extended duty cycle, the current stress in the active power switch is reduced, leading to a significant improvement of the system losses. Moreover, the active power switch in some of the proposed topologies is utilized much better compared to the conventional Zeta and quadratic‐buck converters. The principle of operation, theoretical analysis, and comparison of circuit performances with other step‐down converters are discussed regarding voltage and current stress and switch silicon utilization. Finally, simulation and experimental results for a design example of a 50 W/5 V at 42‐V input voltage operating at 50 kHz will be provided to evaluate the performance of the proposed converters. Copyright © 2014 John Wiley & Sons, Ltd.
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