Noise Convolutional Neural Networks and FPGA Implementation

Abstract

Convolutional neural networks (CNNs) are primarily a cascaded set of pattern recognition filters, which are trained by big data. It enables us to solve complex problems of computer vision applications. A conventional CNN requires numerous parameters (weights) and computations. In this study, we propose a noise CNN (NCNN), which consists of conventional convolutional operation in the former layer and a noise convolutional operation in the latter layers. Noise convolution can be realized by pointwise convolution with the addition of noise to retain recognition accuracy for a large kernel size convolution layer. Using data obtained from theoretical analysis, we apply various convolution layers including a conventional convolution in the former layer and a point-wise convolution with noise in the latter one. Further, we propose an architecture for a noise convolution operation with a pseudo-random circuit as the noise generator. We implement the proposed NCNN in the Xilinx Inc. ZCU104 FPGA evaluation board. The experimental results show that the proposed NCNN can preserve recognition accuracy and achieve high performance.