Abstract

Multi-Processor Systems-on-Chip (MPSoC) are going to be the leading hardware platform featured in embedded systems, if they aren't already. This article deals with the performance estimation problem on these systems. We present in this paper, a new approach of performance estimation of migration software task to hardware component for MPSoC systems with Synchronous Data Flow (SDF) Graphs. This approach is structured on four steps: 1) annotation Kahn Process Network (KPN) model, 2) transformation the annotated KPN model to SDF model, 3) synthesis under constraints and 4) comparison of results. We have using the SDF3 tool to determine performance estimation of migration software task to hardware component. Experiments on MJPEG decoder are made to illustrate the efficiency of our approach of performance estimation.

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