Abstract
In this letter, we develop a no-snapback silicon-controlled rectifier (NS-SCR) in a 0.35- $\mu {\mathrm{ m}}$ BCD technology. This device is constructed by embedding in a typical SCR a p-type/intrinsic/n-type diode as the trigger element and two highly doped extension regions as parts of the bases of the parasitic bipolar transistors. These added features allow for a high electric field to be maintained at the reverse biased n/p junction in the electrostatic discharge (ESD) current path, prevent the onset of strong conductivity modulation, and result in a no-snapback transmission line pulsing $I$ – $V$ characteristic. Stacking the NS-SCR’s offers an ESD protection solution that is area-efficient, robust, and latch-up immune. The high temperature effect on the leakage current of NS-SCR is also studied.
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