Abstract
Higher LHC energy and luminosity increase the challenge of trackreconstruction for the ATLAS trigger. To effectively handle the veryhigh data rate, a dedicated hardware-based system has been designed.The Fast Track Trigger (FTK) will provide high quality trackreconstruction over the entire detector volume to be run after thefirst level trigger has accepted an event. It will help to improve theefficiency and background rejection for triggers on tau leptons andb-hadrons by the second level trigger and help reduce the luminositydependence of isolation requirements for electrons and muons. In thispaper we present the status of associative memory design and itsfuture development.
Highlights
Most CPU-intensive aspect of tracking by processing hundreds of millions of roads nearly simultaneously as the silicon data pass through Fast Track Trigger (FTK)
The Fast Track Trigger (FTK) will provide high quality track reconstruction over the entire detector volume to be run after the first level trigger has accepted an event
For the FTK upgrade of the ATLAS experiment at CERN we had to change the approach of the memory core design
Summary
We describe the project constraints and architectural solutions that have brought AMchip asic design from a purely standard cell layout to a full custom layout of the memory core. The goal was to reach a density of 5000 patterns per chip consuming 1W at a 40MHz clocking frequency This chip was designed using a full standard cell architecture both for the memory core and control logic. For the FTK upgrade of the ATLAS experiment at CERN we had to change the approach of the memory core design. In this application the AMchip has to process events coming from the inner tracker (pixel and SCT detectors) at the Level-1 trigger rate, about 100KHz. The new design constraints were. Instead we decided to use a mixed approach in which the control logic is designed using standard cells, while the memory core is a full custom design. AMchip was designed with this philosophy in order to contain the power consumption and increase the number of patterns that could be stored in the memory
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