Abstract

We found that for the implementation of the prime factor FFT algorithm on a modern digital signal processor (DSP), e.g. the ADSP 2100, the shortlength DFT-modules exhibiting the minimum multiply configuration as developed by S. Winograd are not the optimum choice. New modules which yield an increase of up to 15% in execution speed and a 1 bit increase in accuracy are designed by a novel powerful method

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.