Abstract
The I/O VS-MRAC redesign and stability analysis presented earlier for the case of plants with relative degree n* ≤ 2 (ACC'92), is generalized to the case of arbitrary n*. The redesign is based on the explicit consideration of input disturbances which, in addition to actual external disturbances, may include the disturbance originated by the uncertainty of the plant high frequency gain (HFG). This leads to considerably simpler and less restrictive stability analysis, as well as to more effective controller design for external disturbance rejection. It is shown that the overall error system is globally exponentially stable with respect to some small residual set, in agreement with the remarkable performance exhibited by the proposed controller. Simplified I/O VS-MRAC schemes are also discussed.
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