New nonvolatile memory with charge-trapping sidewall

Abstract

This letter reports on the development of a new nonvolatile memory with charge-trapping sidewalls using sub-0.1-μm MOSFET technology. This memory has silicon nitride (SiN) sidewalls at both sides of the gate to store the charge. We have found that optimization of the p-n junction edge with the sidewall enables writing, reading, and erasing a 2-bit charge independently. The Vth window, which is the difference in the threshold voltage between forward and reverse read, was about 0.8 V with a gate length of 0.4 μm. In addition, it is scalable to 40 nm of the gate length. This device is attractive not only from the prospects of future size reduction, but also its compatibility with CMOS process.