New low contact resistance triple capping layer enabling very high Gm InAIAs/lnGaAs HEMTs

Abstract

It has been demonstrated that a highly doped (Si:3 × 1019 cm-3) triple capping layer consisting of n+−In0.53Ga0.47As, n+−In0.52Al0.48As, and n+-In0.53Ga0.47As can remarkably reduce the parasitic source resistance in InP-based high electron mobility transistors (HEMTs). The analysis of the source resistance revealed that the resistance element at the n+−In0.53Ga0.47As/un−In0.52Al0.48As/un-In0.53Ga0.47As channel heterointerfaces was as large as 70% of the source resis-tance when nonalloyed ohmic electrodes were used. The highly doped triple capping layer reduces the resistance contribution of vertical conduction between the capping layer and 2DEG channel. A low source resistance of 0.57 Ωmm and a low contact resistivity of 3 × 10−5 Ωcm2 were obtained for the HEMTs with the highly doped triple capping layer, which were 60% lower and one order of magnitude smaller than those for the HEMTs with a conventional single capping layer doped 5 × 1018 cm−3, respectively. These values were also 70 and 30% lower than those for the HEMTs with a highly doped (3 × 1019 cm−3) single capping layer, respectively. The low source resistance brings high peak extrinsic transconduc-tance of 1 S/mm for a device with 0.4 μm long gate, which was 42% higher than the previously reported HEMTs with the same gate length.