New in-place strategy for a mixed-radix FFT processor

Abstract

This paper proposes a fast Fourier transform (FFT) processor using a new in-place strategy and the mixed-radix algorithm. The proposed processor uses only two N-word memories for a continuous flow FFT implementation, due to the new in-place strategy, while existing continuous FFT processors use four N-word memories. In addition, the proposed processor satisfies both small area and real-time processing requirement. The gate count of the processor is 37,000 and the number of clock cycles is 640 for a 512-point FFT. Hence, the proposed FFT processor can reduce the gate count and memory size compared with existing FFT processors.