Abstract
In order to improve the dynamic response of synchronous rectified primary-side regulation (PSR) flyback converter, a novel digital control method is proposed. When the output voltage is lower than the lower limit, a large power is transferred from the input to the output. When the output voltage is higher than the upper limit, a large power is transferred from the output to the input with synchronous rectification. During the dynamic control, the load is detected by the output voltage slope. The steady working condition is used as the starting point of normal multimode control when the output returns to the reference voltage. The following output voltage resonance is eliminated. With the proposed control method, the dynamic performance is greatly improved. A FPGA controlled 20V/5A synchronous rectified PSR flyback converter is established to verify the proposed control method. Compared to traditional multimode control, the maximum undershoot voltage and overshoot voltage of the proposed control scheme are improved from 5.02 to 1.63 V and 2.20 to 1.55 V, respectively. The maximum undershoot and overshoot recovery times are reduced from 83.43 to 1.16ms and 25.60 to 1.78ms, respectively.
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