Abstract

In this paper, we propose to investigate the relevance of a combined use of the methodologies commonly used to estimate the fault tolerance of complex integrated circuits (IC) towards radiation effects, in order to propose a clear procedure for estimating this sensitivity. As presented, each of the well-known methodologies is relevant to provide a particular type of result: the pulsed laser stimulation (PLS) to analyze the device memory layout as well as to validate the test set up thanks to fault injection, the accelerator test to evaluate the static soft-error rate (SER), and the Statistical Fault Injection (SFI) to determine the derating factor due to the circuit and the application. Nevertheless, taken separately, none of them is suitable to exhaustively assess the SER at application level in complex ICs. This paper presents an accurate methodology coupling those techniques applied on a STRATIX IV FPGA target with an embedded Nios II Soft-Core running different applications.

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