New Cascaded H-Bridge Multilevel Inverter Topology with Reduced Number of Switches and Sources

Abstract

In this paper mainly focused on the design and implementation of new topology in a single phase five level cascaded H-bridge multilevel inverter by using only a five switches and two DC power source. The main objective of this paper is to increase number of levels with a low number of switches and sources at the output without adding any complexity to the power circuit. The main merit of the new topology is to reduce the lower total harmonic distortion, lower electromagnetic interference generation and high output voltage. In this paper, various carrier pulse width modulation techniques are proposed, which can minimize the total harmonic distortion and enhances the output voltages from proposed work of five level inverter. The various switching topologies of single-phase five level cascaded H-bridge multilevel inverters have been analyzed in this paper. It is justified that the new topology can be recommended to single phase five level Cascaded H-bridge inverter for better performance in comparison with conventional method. The simulation is done by Mat Lab 8.0 version software.