New Bi-Mode Gate-Commutated Thyristor Design Concept for High-Current Controllability and Low ON-State Voltage Drop

N Lophitis,J Vobecky,M Rahimo,M Antoniou,U Vemulapati,M Arnold,I Nistor,F Udrea

doi:10.1109/led.2016.2533572

Abstract

A new design approach for bi-mode gate-commutated thyristors (BGCTs) is proposed for high-current controllability and low ON-state voltage drop. Using a complex multi-cell mixed-mode simulation model which can capture the maximum controllable current (MCC) of large area devices, a failure analysis was performed to demonstrate that the new design concept can increase the MCC by about 27% at room temperature and by about 17% at 400 K while minimizing the ON-state voltage drop. The simulations depict that the improvement comes from the new approach to terminate the GCT part in the BGCT way of intertwining GCT and diode regions for reverse conducting operation.

Highlights

E lectronic devices with high power rating are increasingly being used in power transmission and distribution
The model developed for Bi-mode Gate Commutated Thyristors (BGCTs) in [6] is used which allows us to directly compare the new design with its state-of-the-art conventional counterpart
A BGCT wafer device consists of two Finite Element Method (FEM) BGCT cells which are interconnected with wires defined using a compact model

Summary

INTRODUCTION

E lectronic devices with high power rating are increasingly being used in power transmission and distribution. In this paper a new design is proposed which supersedes the conventional design optimization methodology for high Maximum Controllable Current (MCC), further improves the MCC and minimises the on-state losses. It provides an improved design concept for the GCT part in the Bi-mode GCT arrangement which solves the pressing demand of lowering the ON-state losses and increasing the MCC for the generation GCT-like devices. When compared to the conventionally optimised BGCT design [6] shown, the new design depicted, features the same diode and p-n-p Bipolar Junction Transistor (BJT) separation region, equal cell dimensions, cathode, anode and gate region area. The GCT p-base region in the proximity of the diode is reduced and no GCT gate metallisation is included in the GCT p-base region next to the diode part

METHODOLOGY FOR DEVICE SIMULATIONS

CURRENT CONTROLLABILITY

Findings

CONCLUSIONS