New aspects for lifetime prediction of bipolar transistors in automotive power wafer technologies by using a power law fitting procedure

Abstract

Bipolar transistors are part of the design manuals of almost all semiconductor wafer technologies. These design library devices must be qualified and released according to the present qualification standards, e.g. AEC (automotive electronic council) or JEDEC [Automotive Electronic Council. AEC-Q100-Rev-F; 2003; Automotive Electronic Council. AEC-Q101-Rev-C; 2005; JEDEC JP-001. Foundry process qualification guideline; 2002]. Dedicated stress tests (e.g. high temperature electrical operation (HTEO), bias temperature stress (BTS) or emitter base reverse bias (EBRB)) must be performed to check device specific drift and degradation mechanisms. A lifetime prediction must be performed on base of the determined device parameter drifts. The mentioned qualifications tests are arranged at typical device application conditions for electrical operation and temperature. Due to the breakdown behaviour of bipolar transistors the electrical operation parameters are limited to the save-operation-area (SOA). This excludes the possibility of any acceleration during these tests. Based on this fact the final check of the requested device lifetime in customer applications can be performed only by non-accelerated end-of-life tests. The paper shows a review of typical stress tests of dedicated bipolar transistors of an automotive power wafer technology. A presentation of the drift behaviour of the current gain (beta) parameter as function of stress time and qualification test is presented. In order to replace the end-of-life test requirement and to find a new approach to estimate the expected lifetime in the final device application a power law fitting procedure will be introduced. New aspects to discuss these results with respect to the defined lifetime target will be shown.