Abstract
A 3-D one-carrier device solver has been developed on an Intel iPSC2 hypercube multiprocessor which can handle over 130 K nodes. CPU time averages 20 min per bias point on a 50 K-node MOSFET example. Slotboom variables are used in conjunction with the Scharfetter-Gummel current discretization scheme. A scaling scheme is proposed which produces n, p variables from the Slotboom variables. An improved damped-Newton scheme, which maintains the iteration numbers at below fifteen for high gate biases, is used in solving Poisson's equation. The performance of a previously proposed initial guess scheme is improved through the use of a novel update strategy during the Poisson solution stage after the initial guess step. This improvement allows stable calculation for voltage steps as high as 5 V. A modified singular perturbation scheme (MSP) has been proposed whose implementation speeds up the convergence under high-V/sub gs/ and -V/sub ds/ bias conditions by a factor of three to six. A block matrix analysis of the MSP scheme yields insight into its performance. >
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