Abstract
This paper presents a novel Neurospace Mapping (Neuro-SM) method for packaged transistor modeling. A new structure consisting of the input package module, the nonlinear module, the output package module, and the S-Matrix calculation module is proposed for the first time. The proposed method can develop the model only using the terminal signals, instead of the internal and physical structure information of the transistors. An advanced training method utilizing the different parameters to adjust the different characteristics of the packaged transistors is developed to make the proposed model match the device data efficiently and accurately. Measured data of radio frequency (RF) power laterally diffused metal-oxide semiconductor (LDMOS) transistor are used to verify the capability of the proposed Neuro-SM method. The results demonstrate that the novel Neuro-SM model is more accurate and efficient than existing device models.
Highlights
With the development of electronic technology, the accurate computer-aided design (CAD) models of transistors play a decisive role in the circuit/system design with high performance and reliability [1, 2]
The package modeling method we proposed can be applied to arbitrary packaging structures, because the advanced package module is achieved only using the terminal signals, instead of the internal and physical structure information of the package circuit
In order to perform the nonlinear characteristic of active cells in packaged transistor, Neuro-SM modeling method in literature [22] is used
Summary
With the development of electronic technology, the accurate computer-aided design (CAD) models of transistors play a decisive role in the circuit/system design with high performance and reliability [1, 2]. The transistor in the circuit system contains the active cells, and the passive devices such as the encapsulated package circuit. In order to predict the electrical performance of the packaged transistor, the CAD model must accurately reflect the characteristics of the active cells and the packaged circuit. When the equivalent-circuit parameters are simultaneously optimized by the device data, the exact relationship between the voltage and current of packaged transistor can be obtained. A modeling method based on EM theory was presented in [10] to predict the EM feature of the three-dimensional construction of a high-power RF transistor with internal matching networks. These existing Neuro-SM methods mainly focus on modeling for the active cells of transistor. We proposed a new modeling method for packaged transistor based on Neuro-SM. To verify the availability of the proposed modeling approach, a practical example on modeling RF power LDMOS transistor is presented
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