Neuromorphic VLSI Models of Selective Attention: From Single Chip Vision Sensors to Multi-chip Systems.

Giacomo Indiveri

doi:10.3390/s8095352

Abstract

Biological organisms perform complex selective attention operations continuously and effortlessly. These operations allow them to quickly determine the motor actions to take in response to combinations of external stimuli and internal states, and to pay attention to subsets of sensory inputs suppressing non salient ones. Selective attention strategies are extremely effective in both natural and artificial systems which have to cope with large amounts of input data and have limited computational resources. One of the main computational primitives used to perform these selection operations is the Winner-Take-All (WTA) network. These types of networks are formed by arrays of coupled computational nodes that selectively amplify the strongest input signals, and suppress the weaker ones. Neuromorphic circuits are an optimal medium for constructing WTA networks and for implementing efficient hardware models of selective attention systems. In this paper we present an overview of selective attention systems based on neuromorphic WTA circuits ranging from single-chip vision sensors for selecting and tracking the position of salient features, to multi-chip systems implement saliency-map based models of selective attention.

Highlights

Processing detailed sensory information in real-time is a computationally demanding task for both natural and artificial sensory systems: if the amount of information provided by the sensors exceeds the parallel processing capabilities of the system, as is usually the case for example with vision systems, Sensors 2008, 8 an effective strategy is to select sub-regions of the input and process them serially, shifting from one sub-region to another, in a sequential fashion [1, 2]
We focus on hardware implementation of such selective attention systems on compact, low-power, hybrid analog/digital VLSI chips
We presented an overview of neuromorphic VLSI models of selective attention systems applied to visual tracking applications

Summary

Introduction

Processing detailed sensory information in real-time is a computationally demanding task for both natural and artificial sensory systems: if the amount of information provided by the sensors exceeds the parallel processing capabilities of the system, as is usually the case for example with vision systems, Sensors 2008, 8 an effective strategy is to select sub-regions of the input and process them serially, shifting from one sub-region to another, in a sequential fashion [1, 2]. The output currents of all edge-polarity detector circuits in the array are sourced in parallel to the elements of the processing stage: the hysteretic WTA network This is the most important computational primitive for implementing models of selective attention mechanisms. The input stimulus was a 1cm-wide black bar on a white background positioned at approximately 17cm away from the focal plane and imaged onto the chip through a 4mm lens moving from left to right with an on chip speed of This circuit, originally proposed in [32], comprises a parallel array of voltage followers with a common global output voltage, which receive inputs from nodes with increasing voltage references, distributed along a linear resistive network.

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