Abstract
Monolithic integration of silicon with nano-sized Redox-based resistive Random-Access Memory (ReRAM) devices opened the door to the creation of dense synaptic connections for bio-inspired neuromorphic circuits. One drawback of OxRAM based neuromorphic systems is the relatively low ON resistance of OxRAM synapses (in the range of just a few kilo-ohms). This requires relatively large currents (many micro amperes per synapse), and therefore imposes strong driving capability demands on peripheral circuitry, limiting scalability and low power operation. After learning, however, a read inference can be made low-power by applying very small amplitude read pulses, which require much smaller driving currents per synapse. Here we propose and experimentally demonstrate a technique to reduce the amplitude of read inference pulses in monolithic neuromorphic CMOS OxRAM-synaptic crossbar systems. Unfortunately, applying tiny read pulses is non-trivial due to the presence of random DC offset voltages. To overcome this, we propose finely calibrating DC offset voltages using a bulk-based three-stage on-chip calibration technique. In this work, we demonstrate spiking pattern recognition using STDP learning on a small 4×4 proof-of-concept memristive crossbar, where on-chip offset calibration is implemented and inference pulse amplitude could be made as small as 2mV. A chip with pre-synaptic calibrated input neuron drivers and a 4×4 1T1R synapse crossbar was designed and fabricated in the CEA-LETI MAD200 technology, which uses monolithic integration of OxRAMs above ST130nm CMOS. Custom-made PCBs hosting the post-synaptic circuits and control FPGAs were used to test the chip in different experiments, including synapse characterization, template matching, and pattern recognition using STDP learning, and to demonstrate the use of on-chip offset-calibrated low-power amplifiers. According to our experiments, the minimum possible inference pulse amplitude is limited by offset voltage drifts and noise. We conclude the paper with some suggestions for future work in this direction.
Highlights
Neuromorphic computing has recently attracted more attention
We present the results of the synapse characterization and simple template matching
EXPERIMENTAL RESULTS Fig. 10 shows the experimental setup of the memristive crossbar for pattern recognition using offset calibrated low-power amplifiers. It mainly comprises the test-PCB incorporating the chip under test, a SPARTAN -6 driver board, the auxiliary boards, a Mixed Signal Oscilloscope (MSO), and its digital pod
Summary
Neuromorphic computing has recently attracted more attention. It all started in the late 1980s, when Caver Mead first coined the term ‘neuromorphic’ and proposed the concept ofThe associate editor coordinating the review of this manuscript and approving it for publication was Yong Chen .morphing the biological brain on a chip [1]. Neuromorphic computing has recently attracted more attention. It all started in the late 1980s, when Caver Mead first coined the term ‘neuromorphic’ and proposed the concept of. The associate editor coordinating the review of this manuscript and approving it for publication was Yong Chen. Morphing the biological brain on a chip [1]. The main components in neuromorphic computing are neurons interconnected by synapses. The main idea of silicon neurons is to use sub-threshold transistor currents (in the order of nA) to mimic the biophysical properties of neurons. Such brain-inspired neuromorphic computing systems have been attractive because their co-location of memory.
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