Abstract

Neuromorphic computing has emerged as a promising avenue towards building the next generation of intelligent computing systems. It has been proposed that memristive devices, which exhibit history-dependent conductivity modulation, could efficiently represent the synaptic weights in artificial neural networks. However, precise modulation of the device conductance over a wide dynamic range, necessary to maintain high network accuracy, is proving to be challenging. To address this, we present a multi-memristive synaptic architecture with an efficient global counter-based arbitration scheme. We focus on phase change memory devices, develop a comprehensive model and demonstrate via simulations the effectiveness of the concept for both spiking and non-spiking neural networks. Moreover, we present experimental results involving over a million phase change memory devices for unsupervised learning of temporal correlations using a spiking neural network. The work presents a significant step towards the realization of large-scale and energy-efficient neuromorphic computing systems.

Highlights

  • Neuromorphic computing has emerged as a promising avenue towards building the generation of intelligent computing systems

  • Each biological synapse contains a plurality of presynaptic release sites[53] and postsynaptic ion channels[54]

  • Our implementation of plasticity through changes in the individual memristors is analogous to individual plasticity of the synaptic connections between a pair of biological neurons[55], which is true for the individual ion channels of a synaptic connection[55,56]

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Summary

Introduction

Neuromorphic computing has emerged as a promising avenue towards building the generation of intelligent computing systems. A new class of nanoscale devices has shown promise for realizing the synaptic dynamics in a compact and power-efficient manner These memristive devices store information in their resistance/conductance states and exhibit conductivity modulation based on the programming history[6,7,8,9]. Demonstrations that combine memristive synapses with digital or analog CMOS neuronal circuitry are indicative of the potential to realize highly efficient neuromorphic systems[27,28,29,30,31,32,33] To incorporate such devices into large-scale neuromorphic systems without compromising the network performance, significant improvements in the characteristics of the memristive devices are needed[34]. Some of the device characteristics that limit the system performance include the limited conductance range, asymmetric conductance response (differences in the manner in which the conductance changes between potentiation and depression), nonlinear conductance response (nonlinear conductance evolution with respect to the number of pulses), stochasticity associated with conductance changes, and variability between devices

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