Abstract
Use is made of a neural architecture to realise a low-offset VLSI implementation of an n-port voltage comparator that performs the winner-take-all function. The circuit has a wide resolution (~50 dB), high gain, and a Hopfield-like positive feedback interconnect matrix, making possible the detection of very small perturbations (< 10 mV). The circuit is suitable for applications in Hamming and neural networks, vector quantisers, and other analogue parallel signal processing systems. The performance of the network was measured on a 32 input 2.0 µm CMOS circuit.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
