Network-on-Chip Routers for Efficient Dataflow Computing: A Survey

Abstract

Dataflow computing is seen as an advantageous method for parallel processing and provides efficiency in CPU intensive applications. The Network-on-Chip (NoC) is an integrated communication framework that employs router-based packet switching techniques to provide better throughput and deliver higher scalability for the system; thus, NoC is significant for dataflow computing. Hence router design proves to be essential for the performance of the architecture. The routers used in control flow architecture cannot be used in dataflow computing since multicasting is necessary and due to the higher injection rate in dataflow architecture. Thus the routers designed for dataflow computing with NoC is limited due to the technical challenges. In this paper, firstly, basic concepts of NoC and dataflow architecture are introduced and then a survey on three routers designed for dataflow computing: baseline routers, multicast routers with output buffers, and multicast routers with shared buffer (MRSB), along with their advantages and limitations. This paper would be helpful for the study of dataflow computing with NoC and router designs.