Abstract
Network-on-Chip is a good approach to working on intra-chip communication. Networks with irregular topologies may be better suited for specific applications because of their architectural nature. A good design space exploration can help the design of the network to obtain more optimized topologies. This paper proposes a way of optimizing networks with irregular topologies through the use of a genetic algorithm. The network proposed here has heterogeneous routers that aim to optimize the network and support applications with real-time tasks. The goal is to find networks that are optimized for average latency and percentage of real-time packets delivered within the deadline. The results show that we have been able to find networks that can deliver all the real-time packets, obtain acceptable latency values, and shrink the chip area.
Highlights
Real-Time and Non-Real-TimeWith the decrease in the size of transistors, it was possible to put thousands of them into a single silicon wafer, which caused the advent of Systems-on-Chips (SoCs)
This work aims to generate irregular networks optimized through design space exploration (DSE), seeking to improve latency compared to a mesh topology
This paper analyzed the use of irregular topologies to obtain networks with optimized values for latency, area, and a higher rate of real-time packets delivered within the stipulated deadline
Summary
With the decrease in the size of transistors, it was possible to put thousands of them into a single silicon wafer, which caused the advent of Systems-on-Chips (SoCs). It was possible to put several processors communicating together, characterizing an MP-SoC (Multiprocessor System-on-Chip). Networkson-Chips (NoCs) emerged [1,2]. NoCs are formatted by a set of routers that are interconnected, forming a topology [3,4]. Routers have the function of forwarding the messages from their source to their destination to provide network communication. How routers are interconnected is directly related to network performance [5,6,7], since the routers route the packets to their destinations. Different topology types occupy different areas due to the way the routers are organized
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